ANKITHA; JAYALAXMI H. Full Adder Circuit Based on Complementary Energy Path Adiabatic Logic using NAND Gates. Journal of Communication Engineering and VLSI Design, [S. l.], v. 1, n. 1, p. 1–5, 2023. DOI: 10.48001/jocevd.2023.111-5. Disponível em: https://qtanalytics.in/publications/index.php/JoCEVD/article/view/36. Acesso em: 15 jan. 2025.